Programming: ADC (Analog to Digital Converter) Enabling a Prescaler

When using the ADC, a prescaler must be established to have the ADC timer fall within an acceptable range. This input clock frequency acceptable range is between 50kHz and 200kHz. To determine the prescaler value for these frequency ranges, take your clock frequency, usually defaulting at 1,000,000 for an Atmega32 and dividing that with the 50kHz and 200kHz to find the high and low prescaler values. With these values, just go to the table and determine the prescaler that falls between these results. (i.e. 1,000,000/50,000 = 20 and 1,000,000 / 200,000 = 5, so a prescaler between 5 and 20 is acceptable which is either 8 or 16). Configuring the prescaler entails setting the ADPS2, ADPS1, and/or ADPS0 in the ADCSRA control and status register. In the case of using a 16 prescaler, ADPS2 is the bit to be set.